CD4514B 可選擇輸出“高”的 CMOS 4 位鎖存器/4 至 16 線(xiàn)路解碼器

數(shù)據(jù)： CD4514B, CD4515B TYPES 數(shù)據(jù)表

描述

CD4514B and CD4515B consist of a 4-bit strobed latch and a 4-to-16-line decoder. The latches hold the last input data presented prior to the strobe transition from 1 to 0. Inhibit control allows all outputs to be placed at 0 (CD4514B) or 1 (CD4515B) regardless of the state of the data or strobe inputs.

The decode truth table indicates all combinations of data inputs and appropriate selected outputs.

These devices are similar to industry types MC14514 and MC14515.

The CD4514B and CD4515B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), and 16-lead small-outline packages (M and M96 suffixes).

特性

CD4514B輸出“高”選擇
CD4515B輸出“低”選擇

選通輸入鎖存器
禁止控制
100％測(cè)試20 V時(shí)的靜態(tài)電流
在整個(gè)封裝溫度范圍內(nèi)，18 V時(shí)的最大輸入電流為1μA;在18 V和25°C下100 nA
噪聲容限（在整個(gè)封裝溫度范圍內(nèi)）：
- 1 V，V _DD = 5 V
- 2 V V _DD = 10 V
- 2.5 V V _DD = 15 V
< /li>
5 V，10 V和15 V參數(shù)額定值
標(biāo)準(zhǔn)化，對(duì)稱(chēng)輸出特性
滿(mǎn)足JEDEC暫定標(biāo)準(zhǔn)No. 13B的所有要求， “B ??系列CMOS器件描述的標(biāo)準(zhǔn)規(guī)范”
應(yīng)用：
- 數(shù)字多路復(fù)用
- 地址解碼
- 十六進(jìn)制/BCD解碼
- 程序計(jì)數(shù)器解碼
- 控制解碼器

從Harris Semiconductor獲取數(shù)據(jù)表。

參數(shù) 與其它產(chǎn)品相比?編碼器和解碼器

?
Function
Technology Family
VCC (Min) (V)
VCC (Max) (V)
Channels (#)
Voltage (Nom) (V)
F @ Nom Voltage (Max) (Mhz)
ICC @ Nom Voltage (Max) (mA)
tpd @ Nom Voltage (Max) (ns)
Configuration
Type
IOL (Max) (mA)
IOH (Max) (mA)
Rating
Operating Temperature Range (C)
Package Group
Package Size: mm2:W x L (PKG)
Bits (#)
Digital input leakage (Max) (uA)
ESD Charged Device Model (kV)
ESD HBM (kV)
?

CD4514B
Decoder Demultiplexer ? ?
CD4000 ? ?
3 ? ?
18 ? ?
4 ? ?
5 10 15 ? ?
8 ? ?
0.3 ? ?
370 ? ?
4:16 ? ?
Standard ? ?
1.5 ? ?
-1.5 ? ?
Catalog ? ?
-55 to 125 ? ?
SOIC ? ?
24SOIC: 160 mm2: 10.3 x 15.5(SOIC) ? ?
16 ? ?
5 ? ?
0.75 ? ?
2 ? ?